1. Field of the Invention
The present invention disclosed in the present specification relates to a structure of a contact in a semiconductor integrated circuit having a multi-layered wiring structure.
2. Description of Related Art
Hitherto, there has been known a structure of an integrated circuit in which thin film transistors are integrated and arranged on a glass substrate or a quartz substrate.
The thin film transistors are utilized mainly in an active matrix type liquid crystal display. The active matrix liquid crystal display has a structure in which the thin film transistor is disposed in each of pixels arranged in a matrix of several hundreds x several hundreds pixels. The thin film transistor disposed in each pixel has a function of individually controlling charge input/output to/from a pixel electrode.
There has been also known a structure in which peripheral driving circuits for driving the active matrix region are constructed by the thin film transistors and are integrated on the same substrate together with the active matrix region (called as a peripheral integrated circuit type).
In constructing the peripheral driving circuit described above by the thin film transistors, it is necessary to construct such that the plurality of thin film transistors are connected in series.
FIG. 4 shows one example of such structure, i.e. the example in which two thin film transistors are connected in series. That is, a drain of one thin film transistor is connected to a gate of the other thin film transistor.
In the structure shown in FIG. 4, a drain electrode (electrode in contact with the drain region) 11 of one thin film transistor needs to be contacted with a gate electrode 12 of the other thin film transistor. FIG. 6 shows an equivalent circuit of the structure shown in FIG. 4.
FIG. 5 shows a section of this contact taken along a line A-A' in FIG. 4. In FIG. 5, the reference numeral (14) denotes a glass substrate, (13) an interlayer insulating film and (10) a gate insulating film.
The drain electrode 11 and the gate electrode 12 are disposed above and below separately through an intermediary of the interlayer insulating film 13. Various metallic and silicide materials may be used generally as the material of the both electrodes 11 and 12.
In such a structure, an effective area (contact area) substantially utilized for the contact is only the part where a contact aperture denoted by the reference numeral (15) is formed. A region whose size is denoted by the reference numeral (16) is what has been necessary to take a margin in positioning them and becomes useless after forming the contact. That is, this region is not utilized for the contact and is a factor hampering the integration of the circuit.
There is also a problem when a design rule is made rigorous in order to increase the integration that the area of the contact is reduced in proportion to square thereof. For instance, when the design rule is reduced to 5 .mu.m to 3 .mu.m, the area of the contact is reduced by (3/5).sup.2 times.
It means that current density is increased by (5/3).sup.2 times in the contact provided that an operating state required to the thin film transistor is the same.
Such circumstance may cause a failure in the contact. That is, it may cause heat locally in the contact, causing the failure of the contact. The more rigorous the design rule is, the more serious this problem becomes.
Accordingly, it is an object of the present invention disclosed in the present specification to improve the above-mentioned contact structure which has been hampering the integration of circuits to provide a contact structure which allows a higher integration to be obtained.
It is another object of the present invention to provide a structure in which a contact area will not be remarkably reduced even when the design rule is made rigorous.